Our Soft Error Tools

• TFIT cell level — Soft error simulation tool at transistor level for library designers more →
• SOCFIT circuit level — Soft error simulation tool at circuit level for chip architect more →

Our Foundry Partners

Our Services

• Radiation testing
  for chips and systems more →
• Alpha Counting
  for wafers and materials more →
• SER diagnosis and mitigation
  for cell and circuit more →

The IROC difference

The Standard for Soft Error Prevention

Electronic devices are constantly exposed to natural radiations. This can lead to single event effect (SEE) at any time.

SEE cause unpredictable system behavior and threaten safety and reliability. This threat is increasing with small geometries.

We are experts in

• Solutions to anticipate complex reliability issues
• Helping designers anticipate and solve soft error issues
• Characterizing silicon reliability performances