Our Soft Error Tools

  • TFIT — Soft error simulation tool at transistor level for library designers more...
  • SOCFIT — Soft error simulation tool at circuit level for chip architect more...

Our Foundry Partners

tsmc

Our Services

The IROC difference

The Standard for Soft Error Prevention

Electronic devices are constantly exposed to natural radiations. This can lead to single event effect (SEE) at any time.

SEE cause unpredictable system behavior and threaten safety and reliability. This threat is increasing with small geometries.

We are experts in

  • Solutions to anticipate complex
    reliability issues
  • Helping designers anticipate and
    solve soft error issues
  • Characterizing silicon reliability
    performances

News Room

Press Releases

IROC to Introduce TFIT™ 2 at IRPS 2012

more

IROC to Introduce SOCFIT® 3 at IRPS 2012

more

Events

IRPS 2012
4/15 to 4/19/2012
Anaheim, CA, USA

IROC’s team will be happy to welcome you on booth
#214

see floor plan

30th IEEE VLSI Test Symposium
April 22-25, 2012
Hyatt Maui, Hawai, USA

Olivier Lauzeral ,President of IROC Corp.
and Dan Alexandrescu VP Engineering
will present :

“Solving the Soft Error conundrum on SoC with
innovative analytic tools”

Tuesday 4/26: Session 5C: Design for Reliability and
Variability (Regency C)