REPORTING
iRoC Technologies offers standard and detailed
reporting. For
detailed reporting, extra fees may apply, since it requires additional
analysis.
There are three files in the reporting:
- raw data in the form of CSV file
- excel spreadsheet including: Test execution Logbook, Failure in Time (FIT) results and cross sections.
- written report (.pdf)
The table below shows Which Test Item For Which Report Type
| CSV File | Spreadsheet | Test Report | Detailed Analysis Report | |
| Vdd Influence | Raw data | Results per test conditions | Standard [1] | |
| Pattern Influence | Standard [1] | |||
| Clock State Influence | Standard [1] | |||
| Temperature Influence | Standard [1] | |||
| Incident Angle Influence | Standard [1] | |||
| ECC Influence | Standard [1] | |||
| Refresh Influence | Standard [1] | |||
| Back Bias Voltage Influence | Standard [1] | |||
| Data Burst Length Influence | Standard [1] | |||
| Overall FIT Result | Detailed | |||
| Physical Bitmaps | Detailed | |||
| Logical Bitmaps | Detailed | |||
| Per Data Row Bit Flips | Detailed | |||
| Event Size Pareto | Detailed | |||
| SBU Initial State Sensitivity | Detailed | |||
| MCU Size And Repartition | Standard [3] | |||
| MCU Patterns | Standard [3] | |||
| tREF Modification Due To Tests | Standard [3] | |||
| Shmoo plot | Standard [1] |
[1] If test condition is applicable/selected.
Must appear in quote and test plan is such case
[2] Item delivered is requested by customer. Must appear in test plan
is such case
[3] Item is delivered by default if report type is requested
Reporting Format
All test conditions related items are reported the
same way, that is:
One graphic for each event type (SEU, MBU, SEL, SEFI)
Integration of all chip instances into a given graphic
Y-Axis always represents the FIT per Mbit value, or the cross section
for test at multi energy beam facilities or alpha particle testing.
A continuous or discreet X-Axis reflecting the possible test condition
values
Other examples of data reporting are detailed
below:
Physical Bitmaps
The physical bitmap item reflects the error distribution at physical
level resulting from the test. Such analysis allows designers to check
error consistency from a device architecture point of view.
Physical mapping is proposed for all events. It can be displayed for
one sort of event, of for all of them. The report offers up to five
bitmaps.
Figures below shows the bitmap for all events compounded:
MCU Patterns
The MCU patterns can be analyzed.
Statistics are provided for each MCU size in order to see what the
topology of MCU at physical level is.
Only significant patterns are reported in any case. Marginal events
(generally representing less than 2% of cases) are reported as one
event.
The following picture gives an example of such
analysis
|
2-bit MCU shape |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Ref name |
MCU_1x4_2_1 |
MCU_2x1_2_1 |
MCU_2x2_2_1 |
MCU_2x2_2_2 |
MCU_1x2_2_1 |
||||||||||||||||||||
|
% of total 2-bit MCU |
36.8% |
35.1% |
9.9% |
9.4% |
5.1% |
||||||||||||||||||||
|
2-bit MCU shape |
|
|
|
|
|
Remaining 49 other shapes |
|||||||||||||||||||
|
|
|
|
|
|
|||||||||||||||||||||
|
|
|
|
|
|
|||||||||||||||||||||
|
|
|
|
|
|
|||||||||||||||||||||
|
|
|
|
|
|
|||||||||||||||||||||
|
|
|
|
|
|
|||||||||||||||||||||
|
Ref name |
MCU_1x3_2_1 |
|
|||||||||||||||||||||||
|
% of total 3-bit MCU |
2.1% |
1.7% |
|||||||||||||||||||||||
Below is the list of plots, tables and bitmaps generated in the test report:
| X | Standard Report of standard test (automatically generated) | ||||||||
| X | Detailed analysis (proposal, not yet defined, to be discussed) | ||||||||
| Plots (per instance) | FLIPS | SBU | MCU | SEFI | SESB | SEL | Lot vs Lot | Instance vs Instance | |
| Vdd Influence On FIT | X | X | X | X | X | ||||
| Pattern Influence On FIT | X | X | X | X | X | ||||
| Clock State Influence On FIT | |||||||||
| Temperature Influence On FIT | |||||||||
| Incident Angle Influence On FIT | |||||||||
| ECC Influence On FIT | |||||||||
| Refresh Influence On FIT | |||||||||
| Back Bias Voltage Influence On FIT | |||||||||
| Data Burst Length Influence On FIT | |||||||||
| Static vs Dynamic FIT | |||||||||
| Tables | FLIPS | SBU | MCU | SEFI | SESB | SEL | |||
| Overall FIT Result | X | X | X | X | X | X | |||
| Nominal FIT Result | |||||||||
| Worst FIT Result | |||||||||
| Bitmaps (per instance) | Full bitmap | SBU | MCU | SEFI | SESB | SEL | Propagation bitmaps (x3) | MCU patterns | |
| Physical Bitmaps | X | X | X | X | Catalog | All runs | |||
| Per run | |||||||||
| Logical Bitmaps (only in scrambling not available) | X | X | X | X | All runs | ||||
| Per run | |||||||||
| Distribution (per instance) | Full flips | SBU | MCU | SEFI | SESB | SEL | |||
| Per Data Line Bit Flips | X | X | X | All runs | |||||
| Per run | |||||||||
| Pareto plot (per instance) | Full flips | SBU | MCU | SEFI | SESB | SEL | |||
| Pareto, bit flips per event size | X | X | X | All runs | |||||
| Per run | |||||||||