Soft Error Analysis Web Tool

iRoC's SER Web Guide allows you to get a first estimation of the Soft Error Risk for your SoC, ASICs, FPGA or Memories after completing the quick survey.

It also gives you recommendations on What To Do About Soft Errors.

What is the process node you are at?
	180 nm
	150 nm
	130 nm
	110 nm
	90 nm
	65 nm
What type of chip are you working on?
	SoC
	FPGA
	Memory
What is the total area of your chip?
	um²
What is the amount of memory in your chip?
SRAM	Mb
CAM	Mb
DRAM	Mb
Flash	Mb
ROM	Mb
What is the logic cell count of your chip?
Sequential
Combinational
What is the number of metal layers in your technology?

How many I/Os has your chip?