iRoC Technologies, The Soft Error Solution iRoC Technologies, Inc.
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Press Releases

 

Links

Spec and standards

  • Jedec standard: (JESD 89-1A) TEST METHOD FOR REAL-TIME SOFT ERROR RATE
  • Jedec standard: (JESD 89-2A) TEST METHOD FOR ALPHA SOURCE ACCELERATED SOFT ERROR RATE (SER)
  • Jedec standard: (JESD 89-3) TEST METHOD FOR BEAM ACCELERATED SOFT ERROR RATE
  • Jedec standard: (JESD 89A) MEASUREMENT AND REPORTING OF ALPHA PARTICLE AND TERRESTRIAL COSMIC RAY INDUCED SOFT ERRORS IN SEMICONDUCTOR DEVICES
  • www.seutest.com: This is a very good resource put together by the comittee of experts working on the next revision of the Jedec specification. Lots of useful information there.
  • Japanese standard: JEITA EDR-4705
  • AEC-Q100: Failure Mechanism Based Stress Test Qualification For Integrated Circuits (Automotive Electronics Council)

Test labs

  • Lab Locations

R&D Activity

ONBASS

  • ONBASS Consortium Site
  • iRoC participation within ONBASS
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    PARACHUTE

     

    SCADRI

     

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